Battery Burst Droop Estimator (Brownout Margin + Hold-up Caps)
Estimate VBAT sag during a peak current burst (I*R + ESR step + RC droop). Size hold-up caps and check brownout margin.
This complements the Battery Life Estimator: average current tells you how long it runs, burst droop tells you if it stays alive during peaks.
Quick start presets
Coin cell sensor
CR2032-ish, short TX burst
Typical: BLE advertisement / short radio TX from a coin cell. Shows the Rint-limited case.
Wi-Fi burst
LiPo, hundreds of mA
Typical: ESP32-style Wi-Fi association / TX peak on a small LiPo through a buck regulator.
Data logger write
SD-like burst profile
Typical: MCU + SD card writes with tens of ms bursts. Often fixed by bulk near the card/regulator.
LoRa TX burst
2xAA-ish, longer pulse
Typical: LoRa TX bursts from alkaline cells. Shows how pulse length (ms) interacts with tau.
Presets are starting points (illustrative). Fresh / Cold / Aged variants mainly change source resistance (and sometimes VBAT) to show sensitivity.
Inputs
Burst definition
Typical order of magnitude: CR2032 ~10-30 ohm @25C (much higher cold / aged). Small LiPo: ~0.03-0.2 ohm (size-dependent).
Includes switches, fuses, connectors, cables, and PCB traces. Often 0.01-0.2 ohm; can be > 1 ohm with long thin wiring.
Use the effective capacitance at the VBAT node (after DC bias / temperature). Bulk helps for ms-scale bursts; ceramics help for fast edges.
Effective ESR depends on capacitor tech and layout. Roughly: ceramic << polymer << electrolytic.
Results
Estimated minimum VBAT
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Before burst
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Idle steady-state (or periodic start).
0+ (ESR step)
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Immediate drop when caps supply the step.
End of burst
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RC droop towards the I*R limit.
Time constant
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tau = Rtotal * Cbulk
Quick interpretation
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Max continuous burst above Vmin
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Top levers
Capacitance target
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Voltage timeline (one cycle)
Model: 1st-order RC (Rtotal + Cbulk) with constant ESR. Rint is an equivalent resistance (temperature, SOC, and aging dependent).
Details
- Ignores inductance and fast ringing (scope probing matters).
- Does not model regulator UVLO/dropout/control-loop dynamics.
- Assumes a rectangular burst current and constant ESR.
Notes
How to use it (in real life)
1) Start from the failure
- Pick a realistic brownout/UVLO threshold (MCU or regulator)
- Use the burst duration that actually triggers the reset (TX, SD write, Wi-Fi join)
- Enter total series resistance (battery + path)
2) Decide what to change
- If Vss (I*R) is below threshold: long bursts will fail; capacitance can only buy time (reduce R or I for a real fix)
- If the ESR step dominates: add parallel low-ESR ceramics at the load
- If the burst is short vs tau: increase bulk capacitance or shorten the pulse
Measurement tips
- Probe at the point that matters (MCU VDD or regulator input), not at the battery terminals
- Use a short ground spring on the scope probe to avoid fake ringing
- Measure peak current with a small shunt + scope, or a current probe if available