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Closed-form PCB transmission line model

Hammerstad & Jensen Microstrip Formula Explained: Impedance and Effective Permittivity

A practical explanation of the Hammerstad and Jensen microstrip model: what the equations are doing, when they are useful, and where they stop being trustworthy for real PCB sign-off.

Guide Published Mar 10, 2026 Closed-form model explained
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Quick answer

Best use

First-pass sizing of a single-ended outer-layer microstrip above a solid plane.

Main inputs

Trace width W, dielectric height h, copper thickness t, and dielectric constant epsilon_r.

Not enough for

Differential pairs, stripline, solder-mask-aware sign-off, copper roughness, and final fab compensation.

Design reality

A good closed-form model is often less limiting than laminate uncertainty, etch tolerance, and whether the fab assumes solder mask over the trace.

On this page

What the model is for

The Hammerstad and Jensen equations are part of the standard closed-form toolbox for PCB transmission line estimation. They are widely used because they give a fast estimate of microstrip characteristic impedance and effective permittivity without running a field solver.

In practical board design, that makes them useful for three tasks: picking a first-pass width, checking whether a geometry is in the right ballpark, and discussing impedance targets with the board house before the final controlled-impedance stackup is frozen.

Important boundary

This is a quasi-static single-ended microstrip model. It does not replace a fabricator impedance table, a 2D field solver, or TDR validation for critical links.

Variables and geometry

The model is easiest to read if you normalize everything to the dielectric height. A common notation is:

Physical inputs

  • W: finished trace width
  • h: trace-to-plane dielectric height
  • t: copper thickness
  • epsilon_r: substrate relative permittivity

Normalized quantities

  • u = W / h
  • t / h for thickness correction
  • epsilon_eff for the effective dielectric constant
  • Z0 for characteristic impedance

The key physical idea is simple: a microstrip field is partly in air and partly in the dielectric, so it does not "see" the full epsilon_r. That is why the model first estimates an effective permittivity, then uses it to scale the impedance.

Formula breakdown

Different references write the Hammerstad and Jensen equations in slightly different but equivalent forms. The version below matches the same normalized structure used by many practical calculators.

1. Copper thickness correction

Real copper has thickness, so the trace behaves electrically wider than its nominal width. One normalized correction form is: 

u = W / h
delta_u1 = (t / h) / pi * ln(1 + 4e / ((t / h) * coth^2(sqrt(6.517u)))
delta_ur = 0.5 * delta_u1 * (1 + sech(sqrt(epsilon_r - 1)))
u1 = u + delta_u1
ur = u + delta_ur

u1 and ur are corrected width ratios used later in the impedance and effective permittivity steps.

2. Effective permittivity

The model then estimates how much of the field lives in air versus dielectric: 

a(ur) = 1
       + (1 / 49) * ln((ur^4 + (ur / 52)^2) / (ur^4 + 0.432))
       + (1 / 18.7) * ln(1 + (ur / 18.1)^3)

b(epsilon_r) = 0.564 * ((epsilon_r - 0.9) / (epsilon_r + 3))^0.053

epsilon_eff = (epsilon_r + 1) / 2
            + (epsilon_r - 1) / 2 * (1 + 10 / ur)^(-a(ur) * b(epsilon_r))

This is the part that captures the mixed air/dielectric field. For a microstrip, epsilon_eff must stay between 1 and epsilon_r.

3. Characteristic impedance

Once the model has the corrected width ratio and effective permittivity, the characteristic impedance follows: 

f(u1) = 6 + (2pi - 6) * exp(-(30.666 / u1)^0.7528)

Z_air = 60 * ln(f(u1) / u1 + sqrt(1 + (2 / u1)^2))

Z0 = Z_air / sqrt(epsilon_eff)

If width goes up, impedance goes down. If dielectric height goes up, impedance goes up. If dielectric constant goes up, impedance goes down.

Worked examples

Two realistic examples show why this model is useful in day-to-day routing work.

Thin dielectric, close to 50 ohm

W = 0.20 mm, h = 0.10 mm, t = 18 um, epsilon_r = 3.48

This produces a thickness-corrected estimate of about 50.6 ohm with epsilon_eff around 2.73.

  • At W = 0.18 mm, the same stackup moves to about 53.6 ohm.
  • At W = 0.22 mm, it drops to about 47.9 ohm.
  • That is a useful reminder: on a thin dielectric, width tolerance matters quickly.
More typical FR-4 outer layer

W = 0.28 mm, h = 0.18 mm, t = 35 um, epsilon_r = 4.1

This lands around 53.6 ohm with epsilon_eff near 3.10.

  • Reducing width to 0.25 mm moves the estimate up to about 56.7 ohm.
  • Increasing width to 0.30 mm moves it down to about 51.7 ohm.
  • Heavier copper is no longer a small detail once h gets modest.

Why calculators differ

If one calculator says 50.5 ohm and another says 52.2 ohm, that does not automatically mean one of them is wrong. It usually means they made different assumptions.

  • Some use a Wheeler-style approximation as the main result, others only as a cross-check.
  • Some include copper thickness correction, others ignore it or use a different form.
  • Some assume bare microstrip, others quietly include solder-mask loading.
  • epsilon_r may be taken from a generic FR-4 number instead of the actual laminate and frequency.
  • One tool may use finished copper, another may assume base foil before plating and etch.

In practice, once the estimates are within a few ohms, the larger design question is often whether your stackup assumptions match what the fabricator will actually build.

Practical limits and common mistakes

Common mistakes

  • Using a generic FR-4 dielectric constant instead of the actual laminate data.
  • Applying a microstrip equation to an inner-layer stripline.
  • Targeting differential impedance with a single-ended formula.
  • Ignoring solder mask when the board house includes it in the impedance target.
  • Trusting the decimal places more than the fabrication tolerance.

When to move beyond it

  • Very high-speed links where roughness, dispersion, and mask details matter.
  • Fine-pitch stackups with heavy copper or unusual plating assumptions.
  • Differential interfaces with tight odd-mode targets.
  • Interfaces that must match the fabricator impedance coupon exactly.
  • Any case where the return path is broken by plane splits, slots, or dense via transitions.

FAQ

Which dielectric constant should I use for FR-4?

Use the laminate data from the board house at the relevant frequency if you have it. Generic FR-4 numbers are fine for a first pass, but they are not a sign-off input.

Is Hammerstad and Jensen always better than Wheeler?

It is generally a stronger modern closed-form choice for microstrip estimation over a broad range, but a Wheeler-style result is still useful as a sanity check. The larger error source is often not the equation family but the stackup assumption.

Can I reuse this model for USB, PCIe, or Ethernet pairs?

Not directly. Those interfaces are usually routed as differential pairs, so you need an odd-mode or differential impedance model, not a single-ended microstrip equation.

What should I do after the first-pass estimate?

Take the candidate geometry to the fabricator, ask for the real controlled-impedance stackup, and update the width to their process assumptions. For critical links, validate with measurement or the fabricator coupon data.

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