I2C Pull-Up & Rise-Time Planner

Q: How much margin should I keep between the minimum and maximum pull-up values?

Stay roughly mid-way between the minimum and maximum pull-up values. That keeps enough sink-current margin for slow corners and enough rise-time headroom for bus loading or measurement probes.

Q: What if the bus capacitance is higher than the limit suggested here?

You can shorten cables, split the bus with an I2C buffer/repeater, or lower the pull-up voltage to reduce current. In extreme cases, switching to differential buses (like RS-485) or SPI may be more reliable.

Q: Can I run 3.3 V devices on a 5 V pull-up?

Only if every peripheral is 5 V tolerant on SDA/SCL. Otherwise pull the bus to 3.3 V, add a level translator, or use a dual-rail buffer to avoid overstressing the inputs.

Quickly size the pull-up resistors for your I2C bus, estimate rise time, and check compliance with the I2C specification.

Standard & Fast mode • Quick compliance check

Quick presets

Click “Apply” to load values, or “Copy link”.

0.8 m fast sensor tether

Fast • 400 kHz • 2 devices

VCC: 3.3 V
Cable: 0.8 m @ 70 pF/m
Extra: 30 pF
Suggested R: 2.7 kΩ

1.2 m standard backbone

Standard • 100 kHz • multi-drop

VCC: 5.0 V
Cable: 1.2 m @ 80 pF/m
Extra: 60 pF
Suggested R: 2.7 kΩ

Lab breadboard

Standard • 100 kHz • short

VCC: 3.3 V
Cable: 0.3 m @ 50 pF/m
Extra: 20 pF
Suggested R: 4.7 kΩ

Bus parameters

V_CC i

Range: 1 – 12 V (we clamp values outside this window).

SCL mode i

Standard mode • 100 kHz • Rise ≤ 1000 ns

V_OL max (V) i

Range: 0 – V_CC/2 (we clamp to this theoretical limit).

I_OL max (mA) i

Range: 0.5 – 10 mA (typical MCU sink capability).

Bus capacitance

Cable length (m) i

Range: 0 – 20 m (values outside are clamped).

Capacitance per meter (pF/m) i

Range: 10 – 150 pF/m (typical twisted pair: 40–80 pF/m).

Additional capacitance (pF) i

Range: 0 – 500 pF (roughly 15–20 pF per device).

Count ~15 pF per device on the bus.

Recommended resistors

Estimated capacitance: pF

R_pull-up min (I_OL = 3 mA):

R_pull-up max (t_r = 1000 ns):

Evaluate a resistor (kΩ) i

Range: 0.5 – 100 kΩ (tool clamps the value).

Rise time:

Pull-up current: mA

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References: NXP AN10216-1, TI SLVA689.

Need the full wiring checklist?

Follow the I2C wiring workflow

A step-by-step playbook to estimate bus capacitance, size pull-ups, draft the harness, and validate that SDA/SCL stay within spec.

Open the wiring workflow Document your harness

Frequently asked questions

How much margin should I keep between the minimum and maximum pull-up values?

Staying roughly mid-way between the minimum and maximum resistor values keeps both requirements happy: you respect the sink-current limit while staying well inside the rise-time window. If you need extra robustness, aim for about 20% more current than the minimum and 20% faster rise time than required.

What if the bus capacitance is higher than the limit suggested here?

Try reducing cable length, removing unused branches, or lowering the pull-up voltage so the current requirement relaxes. If the bus is still too heavy, consider an I2C buffer/repeater to split the capacitance or migrate the longest segment to a differential standard that tolerates more load.

Can I run 3.3 V devices on a 5 V pull-up?

Only if every device on the bus is 5 V tolerant. Otherwise you should pull the bus up to 3.3 V, add a level shifter, or use a dual-rail buffer. Overstressing the inputs is a common cause of intermittent I2C faults.