PCB Track Width Calculator (IPC-2221)
Estimate a practical starting width for PCB power traces, plus rough DC resistance, drop, and dissipation. Good for early layout sizing and review discussions, not final thermal sign-off on a demanding power path.
Quick start examples
The biggest knobs are current, temperature rise, copper weight, and whether the trace is external or buried. Length mainly matters for drop and dissipation.
Inputs
Thermal target, copper weight, and routing context.
Set to zero if you only care about width and not drop.
Values also auto-update while you edit them.
Width check
Minimum IPC-2221 width
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Run the calculation to see whether the width stays practical, is getting wide, or really wants a pour or heavier copper.
Recommendation
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The recommendation adds margin over the minimum IPC-2221 result.
Copper thickness
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Cross-section
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Resistance
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Voltage drop
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Power dissipation
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Layer context
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Trace view
Visual comparison between the minimum estimate and the wider recommended trace.
Warnings
No warnings.
Model notes
IPC-2221 is useful for early sizing, but not for final sign-off on a real power distribution problem.
- Use IPC-2152 style guidance for more realistic current-carrying capability.
- Also check local bottlenecks, copper pours, and connector heating.
Save the result for layout review
Useful when you want to capture the width target in notes, reviews, or KiCad rule files.
Formula notes
IPC-2221 estimate
This calculator uses the classic IPC-2221 relation between current, temperature rise, and cross-sectional copper area.
Why copper weight and layer matter
More copper thickness increases cross-section directly, while buried internal traces usually need more width because they reject heat less effectively than external traces.
Practical rule: if the width starts looking awkward, do not only widen the trace blindly. Check whether a pour, heavier copper, shorter path, or multiple parallel routes is the cleaner answer.
Frequently asked questions
Should I use the minimum or recommended width?
Use the recommended width or wider. The minimum result is only a starting point and does not include all the margin real boards usually need.
Why are internal traces wider for the same current?
Internal layers cool worse because they are buried inside dielectric, so they usually need more copper area for the same current and temperature rise.
Is this enough for final power-trace sign-off?
No. Treat it as a first-pass estimate and also review IPC-2152 style guidance, local copper spreading, ambient conditions, and real fabrication constraints.